svn commit: r261790 - in head/sys: amd64/include dev/acpica dev/cardbus dev/pccbb dev/pci i386/include sparc64/pci x86/include x86/pci x86/x86

[John Baldwin]

Author: jhb
Date: Wed Feb 12 04:30:37 2014
New Revision: 261790
URL: http://svnweb.freebsd.org/changeset/base/261790
Add support for managing PCI bus numbers. As with BARs and PCI-PCI bridge
I/O windows, the default is to preserve the firmware-assigned resources.
PCI bus numbers are only managed if NEW_PCIB is enabled and the architecture
defines a PCI_RES_BUS resource type.
- Add a helper API to create top-level PCI bus resource managers for each
PCI domain/segment. Host-PCI bridge drivers use this API to allocate
bus numbers from their associated domain.
- Change the PCI bus and CardBus drivers to allocate a bus resource for
their bus number from the parent PCI bridge device.
- Change the PCI-PCI and PCI-CardBus bridge drivers to allocate the
full range of bus numbers from secbus to subbus from their parent bridge.
The drivers also always program their primary bus register. The bridge
drivers also support growing their bus range by extending the bus resource
and updating subbus to match the larger range.
- Add support for managing PCI bus resources to the Host-PCI bridge drivers
used for amd64 and i386 (acpi_pcib, mptable_pcib, legacy_pcib, and qpi_pcib).
- Define a PCI_RES_BUS resource type for amd64 and i386.

Since ia64 only uses ACPI Host-PCI bridges, I believe that this can be enabled
on ia64 by just adding an appropriate #define for PCI_RES_BUS to
<machine/bus.h>. I just have no way to test it.

[Marcel Moolenaar]

Post by John Baldwin

Author: jhb
Date: Wed Feb 12 04:30:37 2014
New Revision: 261790
URL: http://svnweb.freebsd.org/changeset/base/261790
Add support for managing PCI bus numbers. As with BARs and PCI-PCI bridge
I/O windows, the default is to preserve the firmware-assigned resources.
PCI bus numbers are only managed if NEW_PCIB is enabled and the architecture
defines a PCI_RES_BUS resource type.
- Add a helper API to create top-level PCI bus resource managers for each
PCI domain/segment. Host-PCI bridge drivers use this API to allocate
bus numbers from their associated domain.
- Change the PCI bus and CardBus drivers to allocate a bus resource for
their bus number from the parent PCI bridge device.
- Change the PCI-PCI and PCI-CardBus bridge drivers to allocate the
full range of bus numbers from secbus to subbus from their parent bridge.
The drivers also always program their primary bus register. The bridge
drivers also support growing their bus range by extending the bus resource
and updating subbus to match the larger range.
- Add support for managing PCI bus resources to the Host-PCI bridge drivers
used for amd64 and i386 (acpi_pcib, mptable_pcib, legacy_pcib, and qpi_pcib).
- Define a PCI_RES_BUS resource type for amd64 and i386.

Since ia64 only uses ACPI Host-PCI bridges, I believe that this can be enabled
on ia64 by just adding an appropriate #define for PCI_RES_BUS to
<machine/bus.h>. I just have no way to test it.

I'll give it a spin. Altix 350 & Altix 450 have non-standard PCI
host controllers, which I do want to test. The firmware does not
dictate bus numbers, so it may be a non-issue.

Thanks for the heads-up!

[John Baldwin]

Post by Marcel Moolenaar

Post by John Baldwin

Author: jhb
Date: Wed Feb 12 04:30:37 2014
New Revision: 261790
URL: http://svnweb.freebsd.org/changeset/base/261790
Add support for managing PCI bus numbers. As with BARs and PCI-PCI bridge
I/O windows, the default is to preserve the firmware-assigned resources.
PCI bus numbers are only managed if NEW_PCIB is enabled and the
architecture defines a PCI_RES_BUS resource type.
- Add a helper API to create top-level PCI bus resource managers for each
PCI domain/segment. Host-PCI bridge drivers use this API to allocate
bus numbers from their associated domain.
- Change the PCI bus and CardBus drivers to allocate a bus resource for
their bus number from the parent PCI bridge device.
- Change the PCI-PCI and PCI-CardBus bridge drivers to allocate the
full range of bus numbers from secbus to subbus from their parent bridge.
The drivers also always program their primary bus register. The bridge
drivers also support growing their bus range by extending the bus resource
and updating subbus to match the larger range.
- Add support for managing PCI bus resources to the Host-PCI bridge drivers
used for amd64 and i386 (acpi_pcib, mptable_pcib, legacy_pcib, and
qpi_pcib).>>
- Define a PCI_RES_BUS resource type for amd64 and i386.

Since ia64 only uses ACPI Host-PCI bridges, I believe that this can be
enabled on ia64 by just adding an appropriate #define for PCI_RES_BUS to
<machine/bus.h>. I just have no way to test it.

I'll give it a spin. Altix 350 & Altix 450 have non-standard PCI
host controllers, which I do want to test. The firmware does not
dictate bus numbers, so it may be a non-issue.

You will need the rman bits regardless as pci(4) will expect to be able to
allocate a bus resource. For Host-PCI bridge drivers you need to handle
PCI_RES_BUS in bus_alloc_resource(), bus_adjust_resource(), and
bus_release_resource(). Mostly you just need to call the pci_domain
functions passing in the domain the bridge belongs to.